1. Field of the Invention
The present invention relates to a semiconductor memory device and method for manufacturing the device, and more particularly to the structure of a capacitor in a memory cell employed in a semiconductor memory device.
2. Description of the Related Art
Recently, microfabrication techniques for semiconductor memory devices, in particular, dynamic random access memories (DRAMs), have been developed remarkably. In accordance with this tendency, the area occupied by memory cells in semiconductor memory devices has been increasingly reduced. On the other hand, in accordance with a reduction in the voltage applied to a semiconductor memory device, it is necessary to increase the capacitance of a capacitor incorporated in a memory cell in order to operate a DRAM without errors. Thus, how to secure a sufficient capacitance in the capacitor of a memory cell is an important issue.
In general, to increase the capacitance of a capacitor, reducing the thickness of a capacitor insulation film, or increasing the areas of the upper and lower electrodes of the capacitor are possible. However, in light of, for example, reliability, there is a limit to reducing the thickness of the capacitor insulation film. Further, increasing the surface area of each capacitor electrode conflicts with reducing the size of a semiconductor memory device.
To solve these problems, roughening of the surface of the capacitor electrode is now being executed. By making the surface of the capacitor electrode wavy, the surface area is increased. This leads to an increase in the capacitance of the capacitor.
The semiconductor memory device shown in FIG. 19 comprises a capacitor section 101 and MOS metal oxide semiconductor (MOS) transistor section 102. The capacitor section 101 is formed of a lower electrode 103, capacitor insulation film 104 and upper electrode 105. The lower electrode 103 and upper electrode 105 are formed of polysilicon. Reference numeral 106 denotes silicon particles. Part of each particle 106 is embedded in the lower electrode 103. The capacitor insulation film 104 contains the particles 106, and therefore swells at the positions of the particles 106. As a result, the surface of the capacitor insulation film 104 is made wavy or roughened. The surface of the upper electrode 105 is accordingly made wavy.
FIGS. 20-22 show a method for manufacturing the above-described capacitor structure. As seen from FIG. 20, the MOS transistor section 102, interlayer insulation film 108, contact plug, etc., are formed on a semiconductor substrate 107. Subsequently, the lower electrode 103 is formed on the interlayer insulation film 108. After that, a material insulation film 106a of polysilicon is formed on the lower electrode 103 at 500-550° C.
Subsequently, the resultant semiconductor substrate 107 is subjected to a heat treatment of about 600-700° C. As a result of this heat treatment, part of the material insulation film 106a and lower electrode 103 is agglutinated into a plurality of particles 106 as shown in FIG. 21.
After that, the capacitor insulation film 104 is formed on the lower electrode 103, covering the particles 106, as shown in FIG. 21. Thereafter, the upper electrode 105 is formed on the capacitor insulation film 104 as shown in FIG. 19.
To prevent a depletion portion from being formed in a pn-junction when a voltage is applied to a semiconductor memory device having a capacitor, the upper and lower electrodes of the capacitor must contain a sufficient amount of impurity (e.g., As or P). To this end, after the upper and lower electrodes are formed, an impurity is implanted into them. However, it is difficult to deposit the capacitor electrode on the particles 106 while a sufficient amount of impurity is being implanted into the electrode. Therefore, after the capacitor electrodes have been formed, heat treatment is necessary to diffuse the impurity. In the case of a stack-type DRAM in which a capacitor structure is formed after the formation of a transistor structure, the heat treatment degrades the characteristics of the transistor.
Furthermore, attempts are now being made to increase the capacitance of a capacitor using a capacitor insulation film of a high dielectric material, such as a tantalum oxide film (Ta2O5), which has a higher dielectric constant than a silicon oxide film. If a high dielectric material is used for a capacitor insulation film, it is known from research that it is desirable to use a metal of the platinum family, such as ruthenium, as the material of the capacitor electrode.
However, with the conventional capacitor electrode surface roughening techniques, only the surface of the layer covering the particles formed on polysilicon can be roughened. In other words, the conventional roughening techniques can be used only when the lower electrode is formed of polysilicon. If the layer in which particles are embedded, i.e., the lower electrode, is formed of a material other than polysilicon, the conventional techniques cannot be applied, since appropriate conditions that include an appropriate treatment temperature have not yet been found.